James Jeffers

Jim Jeffers was the primary strategic planner and one of the first full-time employees on the program that became Intel® MIC. He served as lead SW Engineering Manager on the program and formed and launched the SW development team. As the program evolved, he became the workloads (applications) and SW performance team manager. He has some of the deepest insight into the market, architecture and programming usages of the MIC product line. He has been a developer and development manager for embedded and high performance systems for close to 30 years.

Intel Xeon Phi Coprocessor High-Performance Programming Intel Xeon Phi Coprocessor High-Performance Programming
by James Jeffers, James Reinders
February 2013
Ebook: $59.95