Chapter 8 ADVANCED DIE-TO-WAFER 3D INTEGRATION PLATFORM: SELF-ASSEMBLY TECHNOLOGY
Tohoku University
In three-dimensional (3D) integration based on die-to-wafer stacking, high-precision chip alignment and low-temperature chip bonding are major two key technologies. However, traditional robotic pick-and-place chip assembly for the die-to-wafer 3D integration has a great disadvantage in production throughput due to the sequential one-by-one process. To overcome the issue, a new multichip self-assembly technology using liquid surface tension as a driving force has been proposed. In the advanced die-to-wafer 3D integration using the self-assembly technology, by the surface ...
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