April 2016
Intermediate to advanced
350 pages
11h 35m
English
Rensselaer Polytechnic Institute
Wafer-level three-dimensional (3D) integration offers the potential of enhanced performance and increased functionality, combined with the low manufacturing cost inherit from monolithic IC processing. This chapter addresses the problem of power delivery in microprocessors, application-specific ICs (ASICs) and system-on-a-chip (SoC) implementations, based upon a wafer-level 3D technology platform with arrays of monolithic DC-DC converter cells in one stratum providing power locally to the signal electronics strata. The chapter consists of five ...
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