
9
STUDY CARD FOR 8051 MICROCONTROLLER
TCON.7 TCON.6 TCON.5
(MSB)
reg. TCON
Direct address 88H
Individual bit address
Set by processor when interrupt signal received at INT1
Cleared by processor when branching to ISR of INT1
Set by processor when interrupt signal received at INT0
Cleared by processor when branching to ISR of INT0
0 = Interrupt generated by a low level signal at INT1
1 = Interrupt generated by a falling edge signal at INT1
0 = Interrupt generated by a low level signal at INT0
1 = Interrupt generated by a falling edge signal at INT0
TF1 TR1 TF0 TR0 IE1 IT1 IT0IE0
(LSB)
88898A8B8C8D8E8F
TCON.4 TCON.3 TCON.2 TCON.1 TCON.0
External interrupt control ...