A Practical Guide to Verilog-A: Mastering the Modeling Language for Analog Devices, Circuits, and Systems

© Slobodan Mijalković 2022

S. MijalkovićA Practical Guide to Verilog-Ahttps://doi.org/10.1007/978-1-4842-6351-8_15

15. Events

Slobodan Mijalković¹  

(1)

The Hague, Zuid-Holland, The Netherlands

 

The behavior of a Verilog-A component can be controlled using events. An event is an occurrence of a particular change in the simulation stage or state of the component. The events have the characteristics of no time duration and events can be triggered and detected in different parts of the Verilog-A code evaluation.

Event Control Statements

Event control statements provide a means of watching for a change in a value. The events are introduced into Verilog-A procedural code by event control statements having syntax:

@ ( event-expression ) procedural-statement ...