A Practical Guide to Verilog-A: Mastering the Modeling Language for Analog Devices, Circuits, and Systems

© Slobodan Mijalković 2022

S. MijalkovićA Practical Guide to Verilog-Ahttps://doi.org/10.1007/978-1-4842-6351-8_19

19. Attributes

Slobodan Mijalković¹  

(1)

The Hague, Zuid-Holland, The Netherlands

 

Verilog-A compilers and simulators often require additional information about specific objects within a Verilog-A code, beyond what is conveyed in the language itself. Attributes provide a mechanism for specifying such additional properties of various objects in the Verilog-A source and are left to be implemented by compilers that want to use them. Only standard Verilog-A attributes shall be implemented by compilers and simulators. Attributes may be used in various ways to control the creation of the executable model and model elaboration before the simulation. ...