Verilog-A is a typed language. The type of an object in Verilog-A code determines its storage size, the set of values it can have, and what operations can be performed on it. This chapter introduces Verilog-A basic types. Expressions combine basic type objects using operators to produce new basic type values. They serve as building blocks of all data manipulation in a Verilog-A code.
Basic Types
There are three basic types in the Verilog-A language: integer, real, and string types. While the types of integer, real, and string literals are implicitly ...