A Practical Guide to Verilog-A: Mastering the Modeling Language for Analog Devices, Circuits, and Systems

© Slobodan Mijalković 2022

S. MijalkovićA Practical Guide to Verilog-Ahttps://doi.org/10.1007/978-1-4842-6351-8_5

5. Parameters

Slobodan Mijalković¹  

(1)

The Hague, Zuid-Holland, The Netherlands

 

Verilog-A provides parameters as module runtime basic type constants. Parameters allow a module to be reused with a different specification and to customize a module's structural and behavioral descriptions for different functionalities. The module instantiation and hierarchical parameter override allow changing values of parameters at the elaboration time to have values that are different from those specified in the parameter declarations. Verilog-A also provides system parameters that are implicitly declared for every module.

Parameter Declarations

A module ...