A Practical Guide to Verilog-A: Mastering the Modeling Language for Analog Devices, Circuits, and Systems

© Slobodan Mijalković 2022

S. MijalkovićA Practical Guide to Verilog-Ahttps://doi.org/10.1007/978-1-4842-6351-8_6

6. Paramsets

Slobodan Mijalković¹  

(1)

The Hague, Zuid-Holland, The Netherlands

 

Paramset is a powerful Verilog-A language construct providing a convenient way to collect common parameter overrides for a specific component technology and define it independently of a particular system design. The paramsets are not only removing the redundancy in parameter overrides for multiple instances of the same module but they are also promoting the exchange of common parameter overrides among different designs.

Introducing Paramsets

The module instantiation often requires long lists of instance parameter overrides with a lot of redundancy among instances ...