ABCs of z/OS System Programming Volume 10

Book description

The ABCs of IBM® z/OS® System Programming is an 13-volume collection that provides an introduction to the z/OS operating system and the hardware architecture. Whether you are a beginner or an experienced system programmer, the ABCs collection provides the information that you need to start your research into z/OS and related subjects. If you would like to become more familiar with z/OS in your current environment, or if you are evaluating platforms to consolidate your e-business applications, the ABCs collection will serve as a powerful technical tool.
This IBM Redbooks® publication, Volume 10, provides an introduction to IBM z/Architecture®, IBM z14 processor design, IBM Z connectivity, LPAR concepts and Hardware Configuration Definition (HCD).
The contents of all the volumes are as follows:
Volume 1: Introduction to z/OS and storage concepts, TSO/E, ISPF, JCL, SDSF, and z/OS delivery and installation
Volume 2: z/OS implementation and daily maintenance, defining subsystems, JES2 and JES3, LPA, LNKLST, authorized libraries, SMP/E, IBM Language Environment®
Volume 3: Introduction to DFSMS, data set basics storage management hardware and software, catalogs, and DFSMStvs
Volume 4: Communication Server, TCP/IP, and IBM VTAM®
Volume 5: Base and IBM Parallel Sysplex®, System Logger, Resource Recovery Services (RRS), global resource serialization (GRS), z/OS system operations, automatic restart management (ARM), IBM Geographically Dispersed Parallel Sysplex™ (IBM GDPS®)
Volume 6: Introduction to security, IBM RACF®, Digital certificates and PKI, Kerberos, cryptography and z990 integrated cryptography, zSeries firewall technologies, LDAP, and Enterprise Identity Mapping (EIM)
Volume 7: Printing in a z/OS environment, Infoprint Server and Infoprint Central
Volume 8: An introduction to z/OS problem diagnosis
Volume 9: z/OS UNIX System Services
Volume 10: Introduction to z/Architecture, z14 processor design, IBM Z connectivity, LPAR concepts, and HCD
Volume 11: Capacity planning, performance management, WLM, IBM RMF™, and SMF
Volume 12: WLM
Volume 13: JES3, JES3 SDSF

Table of contents

  1. Front cover
  2. Notices
    1. Trademarks
  3. Preface
    1. The team who wrote this book
    2. Now you can become a published author, too!
    3. Comments welcome
    4. Stay connected to IBM Redbooks
  4. Chapter 1. Introduction to z/Architecture
    1. 1.1 z/Architecture historical path
    2. 1.2 Computer architecture overview
    3. 1.3 Concept of a process
    4. 1.4 System components
      1. 1.4.1 System Assist Processor (SAP)
      2. 1.4.2 Channels
      3. 1.4.3 Dynamic Switch
      4. 1.4.4 IBM Virtual Flash Memory (VFM)
      5. 1.4.5 Pervasive encryption
    5. 1.5 Processing units (PUs)
    6. 1.6 Microcode Concepts
    7. 1.7 z/Architecture Components
    8. 1.8 PU Registers
      1. 1.8.1 General purpose registers (GPR)
      2. 1.8.2 Floating point registers
    9. 1.9 Instruction set and its formats
    10. 1.10 Program status word (PSW)
      1. 1.10.1 PSW format
    11. 1.11 Multiprocessing
    12. 1.12 z/Architecture Data Formats
      1. 1.12.1 Binary integers
      2. 1.12.2 Decimal numbers
      3. 1.12.3 Floating-point numbers
      4. 1.12.4 EBCDIC data
      5. 1.12.5 ASCII data
      6. 1.12.6 Unicode
      7. 1.12.7 UTF-8
    13. 1.13 IPL of a z/OS logical partition
    14. 1.14 CPC memory addressing
    15. 1.15 Addresses and address spaces
    16. 1.16 Addressing mode
      1. 1.16.1 AMODE
      2. 1.16.2 RMODE
    17. 1.17 Interrupts
      1. 1.17.1 Reasons for interrupts
      2. 1.17.2 Types of interrupts
      3. 1.17.3 Interrupt processing
    18. 1.18 Prefix Storage Area (PSA)
    19. 1.19 Storage protection
      1. 1.19.1 Storage key
      2. 1.19.2 PSW key field
      3. 1.19.3 Storage protection logic
    20. 1.20 Virtual Storage initial concepts
    21. 1.21 Segmenting a virtual address
    22. 1.22 Dynamic address translation (DAT) (I)
    23. 1.23 Dynamic Address Translation (DAT) (II)
    24. 1.24 Translating large virtual address
    25. 1.25 Page faults and page data sets
    26. 1.26 A 64-bit Address Space
    27. 1.27 Cross memory
    28. 1.28 Access register mode (data spaces)
    29. 1.29 z/Architecture time facilities
    30. 1.30 Server Time Protocol (STP)
    31. 1.31 Hardware Configuration Definition (HCD)
    32. 1.32 Logical channel subsystem (LCSS)
    33. 1.33 Start Subchannel (SSCH) instruction logic
    34. 1.34 I/O Interrupt processing
    35. 1.35 DASD controllers (aka DASD controller )
    36. 1.36 Device number
    37. 1.37 Subchannel and subchannel numbers
    38. 1.38 Unit address and logical control unit
    39. 1.39 I/O summary
  5. Chapter 2. Introducing the IBM z14
    1. 2.1 Introducing the IBM z14
    2. 2.2 The z14
    3. 2.3 z14 Technical Highlights
    4. 2.4 z14 System Design
    5. 2.5 Processor unit (PU) instances
    6. 2.6 z14 Hardware models
    7. 2.7 z14 Sub-capacity models
    8. 2.8 z14 frames, drawers, and I/O
    9. 2.9 Processor Drawers
    10. 2.10 Single Chip Module (SCM)
    11. 2.11 Processor Unit (PU)
    12. 2.12 Memory
    13. 2.13 Power and Cooling
      1. 2.13.1 Power
      2. 2.13.2 Cooling
    14. 2.14 Upgrades
      1. 2.14.1 Permanent upgrades
      2. 2.14.2 Temporary upgrades
      3. 2.14.3 Concurrent upgrades
      4. 2.14.4 Customer Initiated Upgrade facility
      5. 2.14.5 Capacity Backup
      6. 2.14.6 Capacity for Planned Events (CPE)
  6. Chapter 3. IBM Z connectivity
    1. 3.1 I/O channel overview
      1. 3.1.1 I/O hardware infrastructure
    2. 3.2 I/O connectivity features
      1. 3.2.1 FICON EXPRESS
      2. 3.2.2 zHyperLink Express
      3. 3.2.3 Open Systems Adapter-Express
      4. 3.2.4 HiperSockets
    3. 3.3 Coupling links
      1. 3.3.1 Coupling Express Long Reach (CE LR)
      2. 3.3.2 Integrated Coupling Adapter: Short Reach (ICA SR)
      3. 3.3.3 Host Channel Adapter3: Optical Long Reach (HCA3-O LR)
      4. 3.3.4 Host Channel Adapter3: Optical (HCA3-O)
      5. 3.3.5 Internal coupling
    4. 3.4 Shared Memory Communications
      1. 3.4.1 SMC-Remote Direct Memory Access (SMC-R)
      2. 3.4.2 SMC-Direct Memory Access (SMC-D)
    5. 3.5 Special-purpose feature support
      1. 3.5.1 Crypto Express features
      2. 3.5.2 Flash Express feature
      3. 3.5.3 zEDC Express feature
    6. 3.6 Channel Subsystem
      1. 3.6.1 Multiple channel subsystems concept
    7. 3.7 CSS configuration management
    8. 3.8 Displaying channel types
  7. Chapter 4. Virtualization and Logical Partition (PR/SM) concepts
    1. 4.1 Virtualization definitions and properties
    2. 4.2 Virtualization concepts
    3. 4.3 Virtualized physical resources
    4. 4.4 Hypervisor types
    5. 4.5 Hypervisor technologies (I)
    6. 4.6 Hypervisor technologies (II)
    7. 4.7 IBM Hypervisors on IBM Z family
    8. 4.8 z/Virtual Machine (z/VM)
    9. 4.9 z/VM options in HMC
    10. 4.10 KVM for IBM Z and DPM
      1. 4.10.1 Hypervisor terminology
    11. 4.11 CPC in PR/SM mode
    12. 4.12 Logical PU concept
    13. 4.13 Shared and dedicated logical PU example
    14. 4.14 PR/SM dispatching and shared CPs
    15. 4.15 PR/SM Weights
    16. 4.16 PR/SM capped versus uncapped
    17. 4.17 Defined capacity or Soft capping
    18. 4.18 Group Capacity
  8. Related publications
    1. IBM Redbooks
    2. Other publications
    3. Online resources
    4. How to get IBM Redbooks
  9. Back cover

Product information

  • Title: ABCs of z/OS System Programming Volume 10
  • Author(s): Lydia Parziale, Patrick Oughton, Alvaro Salla
  • Release date: May 2018
  • Publisher(s): IBM Redbooks
  • ISBN: 9780738443102