66 5. COMPUTATIONAL EXPERIENCE
and-play” capability, and because they can be conveniently adapted to messy real-world problem
e solvers were evaluated according to the quality of solutions returned within ﬁxed time
limits. Not surprisingly, the D-Wave hardware performed very well on native problems in set
(1), always ﬁnding best solutions within a 0.5 second timeout, on problem sizes greater than
n D 150. In test (2), Blackbox tied AK and TB by ﬁnding all optimal solutions within the time
limits (roughly 30 minutes, determined by a bound on total objective function evaluations). In
test (3), Blackbox found best solutions among the four solvers on 27 of 33 instances, although
only two of those solutions matched minimum costs published on the repository website.
5.2 IS IT QUANTUM?
A second thread of research has been aimed at the question of whether D-Wave chips exhibit
quantum properties, as opposed to carrying out a classical annealing process involving magnetic
forces. is question is generally accepted to mean that the qubits should demonstrate entangle-
ment and superposition during the computation. One signiﬁcant obstacle to such a demonstration
is the lack of suitable test apparatus onboard the chips.
Also, given the unusual design approach it is not clear what sort of demonstration might be
considered conclusive. For example, the Hamiltonians used in these platforms create a transition
from “more quantum” superposition of qubit states at the beginning to “less quantum” classical
states at the end of the annealing process. It is also known that entanglement occurs during the
middle part of the transition, but not at the beginning and end. (is limited entanglement is
suﬃcient to ensure correct computation in the underlying model.) “Quantum” and “classical” do
not form a dichotomy in this framework: perhaps the right question is not Is it quantum? but
rather How quantum is it?
e next few sections review work to address questions of quantumness in D-Wave chips.
5.2.1 QUANTUM ANNEALING VS. THERMAL ANNEALING
Johnson et al.  describe experiments to distinguish whether D-wave chips carry out a true
quantum annealing process as opposed to a classical thermal annealing process. ese tests were
run on a single Chimera cell of eight qubits. e Hamiltonian H.t / carries the cell from the initial
, which imposes an equal superposition of all states, to a ﬁnal Hamiltonian H
that is minimized at the “all equal” states """"""""and ########. us each individual qubit
is equally likely to be read as " or as # at the end.
From a single qubit’s perspective, the problem landscape starts out ﬂat and then gradually
transforms into a two-welled landscape corresponding to
, as shown in Figure 5.1.
An energy barrier is gradually raised to separate these two wells. When the energy barrier is low
a qubit can move freely between the two states whether it is classical or quantum. However, a
classical qubit will experience a freezout time according to the height of the barrier, which in
these experiments is linearly dependent on transition time t W 0 ! t
. After the freezout time the