Advances in Embedded and Fan-Out Wafer Level Packaging Technologies

1History of Embedded and Fan‐Out Packaging Technology

Michael Töpper, Andreas Ostmann, Tanja Braun, and Klaus‐Dieter Lang

Fraunhofer IZM, Berlin, Germany

1.1 Introduction

The fabrication of microelectronic systems purely monolithically on a wafer is limited by the need for mixed technologies and redundancy. Multi‐chip modules (MCMs) provided an alternative in achieving high density interconnects (HDI) being originally developed in the 1980s for aerospace applications, where size and weight were critical requirements [1]. The core idea of MCM was therefore the reduction of the interconnection length between different electronic components like integrated circuits (ICs), passives, and others like optoelectronic components. In 1990, silicon devices of 16 mm × 16 mm were the limits of manufacturability in volume production – far from the wafer‐scale integration goals necessary for large electronic systems. Therefore, multiple ICs were needed, which resulted in a hybrid manufacturing process. Standard packaging technologies have used single packaged ICs that are mounted on the printed circuit board (PCB). The electrical signals have to travel from the IC through the package and through the PCB to the next package, limiting the high‐speed performance of the systems. This translates to long interconnection lengths between devices and a corresponding increase in propagation delay. MCM was the first approach to eliminate the package and to use a high density routing substrate instead ...