Advances in Embedded and Fan-Out Wafer Level Packaging Technologies

3Embedded Wafer‐Level Ball Grid Array (eWLB) Packaging Technology Platform

Thorsten Meyer¹ and Steffen Kroehnert²

¹ Infineon Technologies AG, Germany

² Amkor Technology Holding B.V., Netherlands

3.1 Technology Description

Wafer‐level packaging (WLP) is one of the fastest‐growing packaging technologies on the market today. The performance and dimension shrink requirements of today’s advanced products fit WLP technology better than other packaging platforms for many applications and markets. WLP is packaging on the wafer as received from the wafer fabrication (FAB) facility. In comparison with other packaging technologies, the wafer is not separated into individual die before packaging. Solder balls are attached to the active side of the wafer after under‐bump metallization (UBM) is applied. For WLP, two options are known as shown in Figure 3.1, WLP with and without copper redistribution layers (RDL).

Figure 3.1 Principle of WLP with and without redistribution layer (RDL).

No redistribution is required if the die pads are located at the desired positions of the BGA balls and the die size is smaller than 3 mm × 3 mm – only a UBM and a solder ball are applied. For die with peripheral pad‐out, like typical for wire‐bondable designs, RDL is required. RDL is typically applied with thin film technology, well known from the front‐end processing. A passivation layer (dielectric layer) ...