An Introduction to the New IBM eServer pSeries High Performance Switch

4 An Introduction to the New IBM Eserver pSeries High Performance Switch

1.1 Historical background

The following section discusses the technological roots of the IBM Eserver pSeries High

Performance Switch (HPS). Additional historical information is available in other books,

including Inside the RS/6000 SP, SG24-5145.

1.1.1 HPSSDL

In the late 1980s, IBM intended to build a supercomputer for large technical customers. The

High Performance Supercomputer Systems Development Laboratory (HPSSDL) was formed

within the IBM Large Systems Division in Kingston and Poughkeepsie, New York. HPSSDL

intended to create a supercomputer based on the familiar technology of the IBM ES/9000®

vector processing mainframe, depicted in Figure 1-1.

Figure 1-1 Example ES/9000 frame layout

1.1.2 RS/6000®

In 1990, the IBM Advanced Workstation Division in Austin, Texas introduced the RS/6000

(RISC System/6000) family of UNIX-based workstations and servers, such as the one shown

in Figure 1-2. Based on Performance Optimization with Enhanced RISC (POWER) CPU

architecture, HPSSDL became very interested in these early RS/6000 machines due to high

performance floating-point operations and the fact that they ran UNIX, which was popular with

large scientific and technical customers.

Figure 1-2 RS/6000 7012-3xx Series

Chapter 1. Introduction 5

At a crossroad with mainframe technology, HPSSDL experimented with off-the-shelf RS/6000

machines interconnected by ESCON® Channel adapters and an ESCON Director. The

RS/6000 machines were repackaged as nodes and mounted in drawers, which were then

mounted with five drawers to a frame.

1.1.3 SP1® and early switch implementation

IBM in Yorktown, New York was working on a high-speed switch (6 MBps bandwidth and 200

ms latency) while another group on-site developed an eight-drawer frame and the associated

management software. In December 1991, these groups came together as HPSSL (the

“Development” part of the name was dropped) and were charged with shipping a product

within 12 months. Standard RS/6000 workstations were adapted, along with a new version of

the switch developed in Yorktown in place of ESCON for reduced latency. See Figure 1-3.

Figure 1-3 SP frame

The total product was introduced to the marketplace as the SP1 in September of 1993. By

year’s end, 72 systems had been installed around the world in the scientific and technical

community. As the mainframe began losing popularity, commercial customers also began

calling on IBM. IBM formed an application solutions group for the SP1, which, among other

things, ported a parallel version of Oracle’s database to the SP1.

1.1.4 PSSP and SP2®

In 1994, SP development absorbed personnel from the discontinued AIX/ESA® product.

They bolstered the manageability of the system and helped spawn the Parallel System

Support Programs (PSSP) software and the SP2 was born.

The Yorktown-developed switch gave way to the High Performance Switch (HiPS), running at

48 MBps bandwidth and 30 ms latency.

The SP2 moved out from under the umbrella of the Large Systems Division to become its

own enterprise within IBM. SP2 sales were strong: 352 systems were installed by the end of

1994 and 1,023 by the end of 1995.

6 An Introduction to the New IBM Eserver pSeries High Performance Switch

1.1.5 The SP Switch

As with most things in the computing industry, SP2 performance continued to grow. In 1996,

the SP2 was renamed to simply SP and formally became a product of the RS/6000 Division

representing the high-end of the RS/6000 family. SMP nodes were introduced to meet

processing demand. The HiPS gave way to the SP Switch, which, by 1999, provided 180

MBps bandwidth and 21 ms latency. See Figure 1-4.

Figure 1-4 SP frame and switch logical view

1.1.6 PCI and Enterprise Servers

In 1998, PCI nodes based on PowerPC® CPUs, known as Silver Nodes, were introduced. To

meet the needs of demanding workloads, additional machines were added to PSSP clusters,

including the 7017-S70 and S7A, as shown in Figure 1-5 on page 7.

Chapter 1. Introduction 7

Figure 1-5 7017-S70 and expansion racks

In 1999, Winterhawk and Nighthawk nodes were introduced, bringing POWER3™

architecture SMP nodes and a greater performance I/O subsystem and providing support for

Enterprise Server Model 7017-S80.

In the year 2000, Silicon On Insulator and copper interconnect technologies were integrated

into the POWER3-II CPU and released in Winterhawk-II and Nighthawk-II nodes. In July of

2000, PSSP 3.2 was introduced and brought about support for Clustered Enterprise Servers.

This new version of PSSP made it possible to cluster the 7017 enterprise servers without an

SP frame.

Figure 1-6 375 MHz wide node (Winterhawk II)