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Architecting and Building High-Speed SoCs
book

Architecting and Building High-Speed SoCs

by Mounir Maaref
December 2022
Intermediate to advanced content levelIntermediate to advanced
426 pages
10h 40m
English
Packt Publishing
Content preview from Architecting and Building High-Speed SoCs

8

FPGA SoC Software Design Flow

In this chapter, we will delve into the implementation phase of the SoC software of the Electronic Trading System (ETS) for which we developed the architecture in Chapter 6, What Goes Where in a High-Speed SoC Design, and built the hardware in Chapter 7, FPGA SoC Hardware Design and Verification Flow, FPGA SoC Hardware Design and Verification Flow. We will define the SoC software microarchitecture for both the Cortex-A9 processor and its accelerator, the MicroBlaze Packet Processor (PP). We will explore the embedded software development flow using the Xilinx Vitis environment and how to write simple software to run on the SoC processors. We will mainly use the Vitis IDE-generated test application source code for ...

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Publisher Resources

ISBN: 9781801810999Supplemental Content