Artificial Intelligence Applications and Reconfigurable Architectures

4An Overview of the Hierarchical Temporal Memory Accelerators

Abdullah M. Zyarah* and Dhireesha Kudithipudi

University of Texas at San Antonio, Texas, USA

Abstract

The soaring demand for resource-constraint edge devices exacerbates the interest in neuromorphic systems that are based on biomimicking algorithms, such as hierarchical temporal memory (HTM). HTM has the potential to unleash near-sensors edge intelligence with the absence of cloud support. In this review, we provide a comprehensive survey of HTM-based neuromorphic computing systems. Unlike previous studies which shed light solely on the memristor-based implementations, this study covers both pure CMOS and hybrid solutions. The key features offered by each solution are presented including system performance when processing spatial and temporal information, power dissipation, and network latency. Furthermore, challenges associated with enabling real-time processing, on-chip learning, system scalability, and reliability are addressed. This study serves as a foundation to select proper HTM network architecture and technological solutions for edge devices with predefined computational capacity, power budget, and footprint area.

Keywords: Hierarchical temporal memory, cortical learning algorithm, neuromorphic computing, spatial pooler, temporal memory

4.1 Introduction

Hierarchical temporal memory (HTM) [17, 18] is a biologically inspired algorithm that has demonstrated strong capabilities in processing spatial and temporal ...