Skip to Main Content
Communication Architectures for Systems-on-Chip
book

Communication Architectures for Systems-on-Chip

by José L. Ayala
September 2018
Intermediate to advanced content levelIntermediate to advanced
449 pages
13h 16m
English
CRC Press
Content preview from Communication Architectures for Systems-on-Chip
Communication Buses for SoC Architectures 35
FIGURE 2.8
Example of system with a SonicsMX Interconnect including a crossbar and a
shared link.
36 Communication Architectures for SoC
that off-loads slow transfers from the main system interconnect inside more
complex SoCs.
Providing low latency access to a large number of low bandwidth, physi-
cally dispersed target cores, Sonics3220 is fully compatible with IP cores that
support AMBA and OCP standards. Thus, providing the ability to decouple
cores to achieve high IP core reuse. Using a very low die area interconnect
structure facilitates a rapid path to simulation.
As other Sonics SMART Interconnects, the ...
Become an O’Reilly member and get unlimited access to this title plus top books and audiobooks from O’Reilly and nearly 200 top publishers, thousands of courses curated by job role, 150+ live events each month,
and much more.
Start your free trial

You might also like

Autonomic Networking-on-Chip

Autonomic Networking-on-Chip

Phan Cong-Vinh
On-Chip Communication Architectures

On-Chip Communication Architectures

Sudeep Pasricha, Nikil Dutt
Networks on Chips

Networks on Chips

Giovanni De Micheli, Luca Benini, Davide Bertozzi, Israel Cidon, Kees Goossens, Kwanho Kim, Kangmin Lee, Se-Joong Lee, Srinivasan Murali, Hoi-Jun Yoo

Publisher Resources

ISBN: 9781439841716