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Communication Architectures for Systems-on-Chip
book

Communication Architectures for Systems-on-Chip

by José L. Ayala
September 2018
Intermediate to advanced content levelIntermediate to advanced
449 pages
13h 16m
English
CRC Press
Content preview from Communication Architectures for Systems-on-Chip
Communication Buses for SoC Architectures 75
tion, is achived by qualifying all transactions as a noncacheable, nonbuffer-
able, privileged, data access. The AXI protocol uses two signals (The Address
Read/Write Protection Signals: AWPROT and ARPROT, respectively) sig-
nals to provide three levels of protection unit support: normal or privileged,
secure or nonsecure, and an indication if the transaction is an instruction or
adataaccess.
For complex systems, it is often necessary for both the interconnect and
other devices in the system to provide protection against illegal transactions.
It should be noted that designing a secure system takes a chipwide ...
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Publisher Resources

ISBN: 9781439841716