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Communication Architectures for Systems-on-Chip
book

Communication Architectures for Systems-on-Chip

by José L. Ayala
September 2018
Intermediate to advanced content levelIntermediate to advanced
449 pages
13h 16m
English
CRC Press
Content preview from Communication Architectures for Systems-on-Chip
Emerging Interconnect Technologies 179
(a) Optical lithography (b) Four steps DRIE
etch
(c) Wet oxidation
(d) Cave filling with
photoresist
(e) BHF oxide removal (f) Photoresist removal
(g) Dry oxidation (h) Conformal LPCVD
polySi deposition
(i) P olysi patterning
FIGURE 5.10
Vertically stacked Si nanowire process steps in (a)-(i).
180 Communication Architectures for SoC
the successive processes (Figure 5.10(f)). Nanowires are oxidized in dry atmo-
sphere, for a 10 20 nm higher quality oxide, as the dielectric for Field Effect
Transistor (FET) devices (Figure ...
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Publisher Resources

ISBN: 9781439841716