Skip to Main Content
Communication Architectures for Systems-on-Chip
book

Communication Architectures for Systems-on-Chip

by José L. Ayala
September 2018
Intermediate to advanced content levelIntermediate to advanced
449 pages
13h 16m
English
CRC Press
Content preview from Communication Architectures for Systems-on-Chip
Hybrid Topology Exploration for RF-Based On-Chip Networks 221
TABLE 6.5
Energy and delay of bus and interrouter links
Parameters Bus
70 nm 50 nm 35 nm 25 nm 18 nm
Length (mm) 7 4.9 3.43 2.4 1.68
Delay (ps) 498.9 442.9 353.9 247.7 173.4
Energy (pJ) 1.4 0.67 0.28 0.20 0.14
Leakage (nW) 23.5 13.3 3.5 2.4 1.7
Link
70 nm 50 nm 35 nm 25 nm 18 nm
Length (mm) 3.5 2.45 1.7 1.2 0.84
Delay (ps) 233 208.8 167.5 117.3 82.1
Energy (pJ) 0.6 0.29 0.12 0.08 0.06
Leakage (nW) 10.2 5.49 1.4 0.98 0.69
6.7 Results
We will first study the mesh topology enhanced with RF alone for various net-
work parameters. Followed by this, we will understand the effect of overlaying
RF-I on CMESH ...
Become an O’Reilly member and get unlimited access to this title plus top books and audiobooks from O’Reilly and nearly 200 top publishers, thousands of courses curated by job role, 150+ live events each month,
and much more.
Start your free trial

You might also like

Autonomic Networking-on-Chip

Autonomic Networking-on-Chip

Phan Cong-Vinh
On-Chip Communication Architectures

On-Chip Communication Architectures

Sudeep Pasricha, Nikil Dutt
Networks on Chips

Networks on Chips

Giovanni De Micheli, Luca Benini, Davide Bertozzi, Israel Cidon, Kees Goossens, Kwanho Kim, Kangmin Lee, Se-Joong Lee, Srinivasan Murali, Hoi-Jun Yoo

Publisher Resources

ISBN: 9781439841716