Skip to Main Content
Communication Architectures for Systems-on-Chip
book

Communication Architectures for Systems-on-Chip

by José L. Ayala
September 2018
Intermediate to advanced content levelIntermediate to advanced
449 pages
13h 16m
English
CRC Press
Content preview from Communication Architectures for Systems-on-Chip
246 Communication Architectures for SoC
[11] R. Das, S. Eachempati, A. K. Mishra, V. Narayanan, and C. R. Das.
Design and evaluation of a hierarchical on-chip interconnect for next-
generation CMPS. In High Performance Computer Architecture, 2009.
HPCA 2009. IEEE 15th International Symposium on High Performance
Computer Architecture, 175–186, Feb. 2009.
[12] B. S. Feero and P. P. Pande. Networks-on-chip in a three-dimensional
environment: A performance evaluation. IEEE Trans. Comput., 58(1):32–
45, 2009.
[13] B. Grot, J. Hestness, S. W. Keckler, and O. Mutlu. Express cube topolo-
gies for on-chip interconnects. In High Performance Computer Architec-
ture, 2009. HPCA 2009. IEEE 15th International Symposium on High
Performance Computer Architecture, 163–174, ...
Become an O’Reilly member and get unlimited access to this title plus top books and audiobooks from O’Reilly and nearly 200 top publishers, thousands of courses curated by job role, 150+ live events each month,
and much more.
Start your free trial

You might also like

Autonomic Networking-on-Chip

Autonomic Networking-on-Chip

Phan Cong-Vinh
On-Chip Communication Architectures

On-Chip Communication Architectures

Sudeep Pasricha, Nikil Dutt
Networks on Chips

Networks on Chips

Giovanni De Micheli, Luca Benini, Davide Bertozzi, Israel Cidon, Kees Goossens, Kwanho Kim, Kangmin Lee, Se-Joong Lee, Srinivasan Murali, Hoi-Jun Yoo

Publisher Resources

ISBN: 9781439841716