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Communication Architectures for Systems-on-Chip
book

Communication Architectures for Systems-on-Chip

by José L. Ayala
September 2018
Intermediate to advanced content levelIntermediate to advanced
449 pages
13h 16m
English
CRC Press
Content preview from Communication Architectures for Systems-on-Chip
Intra-/Inter-Chip Optical Communications 299
FIGURE 7.37
Power consumption (right axis) and signal propagation delay (left axis) for an
EI as a function of the length. Also the data for two types of OI considering as
the propagation channel a polymer or a silicon waveguide and a interconnec-
tion length equal to 17.6 mm (chip edge length in the ITRS projected chip)
[42] are shown.
cations will consume power lower than 17–18 mW for technologies of 0.18 μm.
Furthermore, smaller integration technologies (0.05 μm) are selected, the re-
duction in power should be reduced drastically to values around 10 μW .These
values require the design and development of ...
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Publisher Resources

ISBN: 9781439841716