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Communication Architectures for Systems-on-Chip
book

Communication Architectures for Systems-on-Chip

by José L. Ayala
September 2018
Intermediate to advanced content levelIntermediate to advanced
449 pages
13h 16m
English
CRC Press
Content preview from Communication Architectures for Systems-on-Chip
Security Issues in SoC Communication 363
age area increment by 4.5, the maximum speed is also reduced by 0.58, and
the power consumption is increased by 4 to 6.
Security Concerns about Masked Logic Styles
As previously seen when discussing WDDL, there are two main factors that
can be exploited by DPA attacks [123, 116]:
1. Leakage caused by the difference of loading capacitance between two
complemetary logic gates in a MDPL gate.
2. Leakage caused by the difference of delay time between the input signals
of MDPL gates (early propagation effect, [60]).
As MDPL uses the same operator for both parts of the compound gate,
it can improve in principle the leak ...
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Publisher Resources

ISBN: 9781439841716