Skip to Main Content
Communication Architectures for Systems-on-Chip
book

Communication Architectures for Systems-on-Chip

by José L. Ayala
September 2018
Intermediate to advanced content levelIntermediate to advanced
449 pages
13h 16m
English
CRC Press
Content preview from Communication Architectures for Systems-on-Chip
368 Communication Architectures for SoC
Precharge
logic
AND
(MUX-DS)
XOR
Correction mask generation
precharge
a
a
a
a
SR SR
Dual rail
FIGURE 8.12
Basic components of PMRML.
in the correction masks generator. Initial masks should come from a Random
Number Generator (RNG), which is assumed to be already available to the
design.
The precharge logic is used to ensure at most one transition at an AND
(NAND) gate during a cycle. This makes the gates glitch-free. Though the
precharge method has been used in many other logic styles, there are two
main differences. First, only a subset of data is conveyed by dual-rail signals.
Specifically, only the selection signals of MUX-DSs ...
Become an O’Reilly member and get unlimited access to this title plus top books and audiobooks from O’Reilly and nearly 200 top publishers, thousands of courses curated by job role, 150+ live events each month,
and much more.
Start your free trial

You might also like

Autonomic Networking-on-Chip

Autonomic Networking-on-Chip

Phan Cong-Vinh
On-Chip Communication Architectures

On-Chip Communication Architectures

Sudeep Pasricha, Nikil Dutt
Networks on Chips

Networks on Chips

Giovanni De Micheli, Luca Benini, Davide Bertozzi, Israel Cidon, Kees Goossens, Kwanho Kim, Kangmin Lee, Se-Joong Lee, Srinivasan Murali, Hoi-Jun Yoo

Publisher Resources

ISBN: 9781439841716