Compact Models for Integrated Circuit Design

4

Large Geometry MOSFET Compact Models

4.1    Introduction

In the two-terminal MOS (metal-oxide-semiconductor) capacitor system in Chapter 3, we have discussed that an inversion condition can be reached by a certain applied gate bias to form a thin layer of minority carrier concentration (e.g., electron) in the majority carrier (e.g., p-type) silicon surface at the silicon/SiO₂ interface. Under this inversion condition, the thermally generated minority carriers diffuse to the surface to form the inversion layer in the majority carrier substrate. However, it is difficult to sustain this minority carrier inversion layer in a majority carrier substrate from thermal generation and subsequent diffusion of these carriers to the surface without ...