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Computer Architecture, 5th Edition by David A. Patterson, John L. Hennessy

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B

Back-off time, shared-media networks, F-23
Backpressure, congestion management, F-65
Backside bus, centralized shared-memory multiprocessors, 351
Balanced systems, sorting case study, D-64 to D-67
Balanced tree, MINs with nonblicking, F-34
Bandwidth See also Throughput
arbitration, F-49
and cache miss, B-2 to B-3
centralized shared-memory multiprocessors, 351–352
communication mechanism, I-3
congestion management, F-64 to F-65
Cray Research T3D, F-87
DDR DRAMS and DIMMS, 101
definition, F-13
DSM architecture, 379
Ethernet and bridges, F-78
FP arithmetic, J-62
GDRAM, 322–323
GPU computation, 327–328
GPU Memory, 327
ILP instruction fetch
basic considerations, 202–203
branch-target buffers, 203–206
integrated units, 207–208 ...

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