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Computer Architecture, 5th Edition by David A. Patterson, John L. Hennessy

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E

Early restart, miss penalty reduction, 86
Earth Simulator, L-46, L-48, L-63
Eckert, J. Presper, L-2 to L-3, L-5, L-19
Eckert-Mauchly Computer Corporation, L-4 to L-5, L-56
ECL minicomputer, L-19
Economies of scale
WSC vs. datacenter costs, 455–456
WSCs, 434
EDSAC (Electronic Delay Storage Automatic Calculator), L-3
EDVAC (Electronic Discrete Variable Automatic Computer), L-2 to L-3
EEPROM (Electronically Erasable Programmable Read-Only Memory)
compiler-code size considerations, A-44
Flash Memory, 102–104
memory hierarchy design, ...

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