144 Computer Architecture and Organization
Processors are to be interfaced with external memory and I/O devices through its system bus com-
posed of address, data and control signals. Power, clock and reset are most common and minimum
inputs to make any processor functional. Continuously fetching, decoding and executing instruc-
tions are major duties of all processors. Every processor offers its own instruction set, composed
of arithmetic, logical, program branching and other necessary instructions. In general, they offer
a few external interrupt input pins and when any one of these pins are activated by a valid signal,
the processor branches to a pre-de ned address to execute the ISR of that interrupt, after saving the
return address on the stack-top. System stack is an area within system RAM where return address
for subroutine calls and other important data and register contents may be temporarily saved in
LIFO scheme.
Intel 8085 is an 8-bit microprocessor with 16 address lines and 8 data lines capable of directly
addressing externally interfaced 64 kB of memory. Fabricated around Princeton architecture, it needs an
external crystal, whose frequency is internally divided by two to generate its system clock. The lower 8
address lines are multiplexed with 8 data lines, which may be de-multiplexed by the falling edge of the
ALE signal. Intel 8085 offers I/O mapped I/O scheme through its IO/M signal, which goes low during
any memory cycle but stays high during any I/O cycle. Five vectored external hardware interrupt inputs
are offered as TRAP, RST7.5, RST6.5, RST5.5 and INTR. Its INTA output serves as the acknowledge
signal for INTR input only and may be used to receive the branching address for its ISR. 8085 offers all
necessary instructions like arithmetic, logical, program branching and so on.
Figure 5.41 Pentium 4 integer register set
M05_GHOS1557_01_SE_C05.indd 144M05_GHOS1557_01_SE_C05.indd 144 4/29/11 5:07 PM4/29/11 5:07 PM

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