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Computer Arithmetic and Validity
book

Computer Arithmetic and Validity

by Ulrich Kulisch
April 2013
Intermediate to advanced content levelIntermediate to advanced
456 pages
16h 7m
English
De Gruyter
Content preview from Computer Arithmetic and Validity
278 Chapter 8 Scalar products and complete arithmetic
If the technology is fast enough it may be reasonable to provide a 256 bit adder
instead of the 170 bit adder. An adder width of a power of 2 may simplify shifting as
well as address decoding. The lower bits of the exponent of the product control the
shift operation while the higher bits are directly used as the starting address for the
accumulation of the product into the CR.
The two flag registers appended to each CR word are indicated in Figure 8.12 again.
In practice the flags are kept in separate registers.
8.7 Comments
8.7.1 Rounding
If the result of an exact scalar product is needed later in
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Publisher Resources

ISBN: 9783110301731