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Computer Arithmetic and Validity
book

Computer Arithmetic and Validity

by Ulrich Kulisch
April 2013
Intermediate to advanced content levelIntermediate to advanced
456 pages
16h 7m
English
De Gruyter
Content preview from Computer Arithmetic and Validity
Section 8.9 Top speed scalar product units 287
8.9 Top speed scalar product units
A top-performance computer is able to read two data x and y to produce the prod-
uct x y into the arithmetic logical unit and/or the SPU simultaneously in one cycle.
Supercomputers and vector processors are typical of this kind of computer. Usually
the floating-point word has 64 bits and the data bus is 128 or even more bits wide.
However, digital signal processors with a word size of 32 bits can also belong in this
class if two 32 bit words are read into the ALU and/or SPU in one cycle. For such
computers both the solutions sketched in Sections 8.4.1 and 8.4.2 make
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Publisher Resources

ISBN: 9783110301731