Chapter Two
Revisiting Processor Allocation and Application Mapping in Future CMPs in Dark Silicon Era
Mohaddeseh Hoveida*; Fatemeh Aghaaliakbari*; Majid Jalili*; Ramin Bashizade*; Mohammad Arjomand†; Hamid Sarbazi-Azad* * Department of Computer Engineering, Sharif University of Technology, Tehran, Iran† School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, United States
Abstract
With technology advances and the emergence of new fabrication and VLSI technologies, current and future chip multiprocessors (CMPs) are expected to have tens to hundreds of processing elements and Gigabytes of on-chip caches, which are connected by a high bandwidth network-on-chip (NoC). Unfortunately, due to limited power ...
