O'Reilly logo

Designing SOCs with Configured Cores by Steve Leibson

Stay ahead with the world's most comprehensive technology and business learning platform.

With Safari, you learn the way you learn best. Get unlimited access to videos, live online training, learning paths, books, tutorials, and more.

Start Free Trial

No credit card required

5.3. Memory Interfaces

Xtensa and Diamond Standard Series microprocessor cores have a number of local-memory interfaces that allow fast access to instructions and data over a wide range of different architectural configurations. Several memory-specific interface types are supported:

  • Instruction and data cache memory

  • Local RAM

  • Local ROM

  • XLMI (high-speed local data bus).

With Safari, you learn the way you learn best. Get unlimited access to videos, live online training, learning paths, books, interactive tutorials, and more.

Start Free Trial

No credit card required