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Designing SOCs with Configured Cores by Steve Leibson

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8.3. The XLMI Port

Diamond processor cores, like all RISC processors, perform speculative read operations that initiate read transactions on the local-memory buses. Data obtained from these read operations may or may not be used, depending on the circumstances in the processor’s pipeline. For example, a branch instruction or interrupt can cause the processor to discard data that it has speculatively read.

Diamond processor load transactions that appear on the processor’s interface ports (with the exception of the PIF) are speculative, so a read operation on the XLMI interface signals does not necessarily mean that the processor will consume the data it reads. A variety of internal events (such as branches) and exceptions can initiate pipeline ...

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