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Designing SOCs with Configured Cores by Steve Leibson

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9.7. System Design with the Diamond 232L CPU Core

Figure 9.9 shows a software-coherent, symmetric-multiprocessing (SMP) system built with four Diamond 232L CPU cores (each with their own local memory) and a large global memory. The four processor cores communicate with each other through the global memory over the shared 32-bit PIF bus. A bus arbiter and locking device control access to the PIF bus. This hardware design can be used to implement either a message-passing or shared-memory SMP system.

Figure 9.9. This multi-processor system design allows four Diamond 232L CPU cores to form an SMP system.

This system allows ...

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