
The IRE unit is introduced on
page 326.
a cyclic redundancy check (CRC) code that may be used
for error detection (and possibly correction). CRC is
computed as G(x) = x 8 + 1 across the 64 information bits
and the 18 VITC sync bits. The CRC can be generated
by an 8-bit shift register and an exclusive-or (XOR)
gate. The CRC is independently computed by the
receiver from the information and sync bits; if the
computed CRC does not match the transmitted CRC,
then an error is known to have occurred in transmis-
sion or recording.
The bit rate of VITC for 480i systems is one-half of ...