Chapter 8
High-level Design Tools for Complex DSP Applications
Chapter Outline
High-level synthesis design methodology
LDPC decoder design example using PICO
Matrix multiplication design example using Catapult C
High-level synthesis design methodology
High level synthesis (HLS) [1], also known as behavioral synthesis and algorithmic synthesis, is a design process in which a high level, functional description of a design is automatically compiled into ...
Get DSP for Embedded and Real-Time Systems now with the O’Reilly learning platform.
O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.