Storage Capacitor Enhancement Techniques

5.1    Introduction

One of the most critical issues in DRAM cell designs is the fabrication of sufficient value reliable storage capacitance while cell size is continuously decreasing. In the beginning, SiO2 was the dielectric used in planar forms of capacitors and reduction in its thickness was the main option for maintaining realized capacitance value with increasing DRAM density. However, beyond 4 Mbit, high leakage prevented further reduction in dielectric thickness and alternatives in the form of the use of materials other than (only) SiO2, structural innovations in the cell, and modification in electrode surface were applied.

In the discussion of the development of DRAMs from 16 Mbit onwards ...

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