A
4.5 Mbit CMOS SRAM, 309
with buried word line, 226
in CMOS vs. NMOS design, 83
and error checking, 331
with inter-vs. intra-subarray replacement, 336
and junction capacitance, 209
with low Vth gated preamplifier (LGA), 329
with offset compensated presensing, 327
and parity method, 331
with twisted driveline SA and MPD, 70
Access transistors, 1; see also Transistors
Address comparators (ACs), 334, 335
Addressing; see also Decoders
Address transition detection (ATD) circuits, 14
AHO, see Al2O3/HfO2 (AHO) dielectric
Akasura, M., 261
Al2O3 film, 156, 167, 178, 181, 225, 232
Al2O3/HfO2 (AHO) dielectric, 222, 224
Al Cu RIE ...
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