3.3.1. Scan architectures
In this subsection, we first describe a few fundamental scan architectures. These fundamental scan architectures include (1) muxed-D scan design, in which storage elements are converted into muxed-D scan cells, (2) clocked-scan design, in which storage elements are converted into clocked-scan cells, and (3) LSSD scan design, in which storage elements are converted into level-sensitive scan design (LSSD) shift register latches (SRLs).
3.3.1.1. Muxed-D scan design
Figure 3.4 shows a sequential circuit example with three D flip-flops. The corresponding muxed-D full-scan circuit is shown in Figure 3.5. An edge-triggered muxed-D scan cell design is shown in Figure 3.5a. This scan cell is composed of a D flip-flop and ...
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