Most processor architectures provide a clock or timer mechanism, typically a programmable register, which generates a periodic interrupt. This register is programmed with an initial value that determines how often the interrupt occurs. If the processor architecture does not support an onboard timer mechanism, the platform will have an external source for generating the periodic interrupt.
eCos uses the hardware timer mechanism to drive its timing features, which consist of:
The kernel uses these timing features to provide time-out, delay, and scheduling services for executing threads. Applications can use the timing features for specific timing-related needs as well.
The HAL ...