An FSMD (finite state machine with data path) combines an FSM and regular sequential circuits. The FSMD can be used to implement systems described by RT (register transfer) operation, which is a methodology to realize a software algorithm in hardware. In this chapter, we provide an overview of the RT operation and extended ASM chart, discuss the derivation of HDL codes, and use several examples to illustrate the development.
An FSMD (finite state machine with data path) combines an FSM and regular sequential circuits. The FSM, which is sometimes known as a control path, examines the external commands and status and generates control signals to specify operation of the regular sequential circuits, which are known collectively as a data path. Algorithms described in RT (register transfer) operation, in which the operations are specified as data manipulation and transfer among a collection of registers, can be converted to FSMD and realized in hardware.
7.1.1 Single RT operation
An RT operation specifies data manipulation and transfer for a single destination register. It is represented by the notation
where rdest is the destination register; rsrc1, rsrc2, and rsrcn are the source registers; and f(·) specifies the operation to be performed. The notation indicates that the contents of the source registers are fed to the f(·) function, which is realized ...