Emerging Nanoelectronic Devices

Emerging Nanoelectronic Devices

Released January 2015
Publisher(s): Wiley
ISBN: 9781118447741

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Book description

Emerging Nanoelectronic Devices focuses on the future direction of semiconductor and emerging nanoscale device technology. As the dimensional scaling of CMOS approaches its limits, alternate information processing devices and microarchitectures are being explored to sustain increasing functionality at decreasing cost into the indefinite future. This is driving new paradigms of information processing enabled by innovative new devices, circuits, and architectures, necessary to support an increasingly interconnected world through a rapidly evolving internet. This original title provides a fresh perspective on emerging research devices in 26 up to date chapters written by the leading researchers in their respective areas. It supplements and extends the work performed by the Emerging Research Devices working group of the International Technology Roadmap for Semiconductors (ITRS).

Key features:

  • Serves as an authoritative tutorial on innovative devices and architectures that populate the dynamic world of "Beyond CMOS" technologies.

  • Provides a realistic assessment of the strengths, weaknesses and key unknowns associated with each technology.

  • Suggests guidelines for the directions of future development of each technology.

  • Emphasizes physical concepts over mathematical development.

  • Provides an essential resource for students, researchers and practicing engineers.

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    Table of contents

    1. Cover
    2. Title Page
    3. Copyright
    4. Dedication
    5. Preface
    6. List of Contributors
    7. Acronyms
    8. Part One: Introduction
      1. Chapter 1: The Nanoelectronics Roadmap
        1. 1.1 Introduction
        2. 1.2 Technology Scaling: Impact and Issues
        3. 1.3 Technology Scaling: Scaling Limits of Charge-based Devices
        4. 1.4 The International Technology Roadmap for Semiconductors
        5. 1.5 ITRS Emerging Research Devices International Technology Working Group
        6. 1.6 Guiding Performance Criteria
        7. 1.7 Selection of Nanodevices as Technology Entries
        8. 1.8 Perspectives
        9. References
      2. Chapter 2: What Constitutes a Nanoswitch? A Perspective
        1. 2.1 The Search for a Better Switch
        2. 2.2 Complementary Metal Oxide Semiconductor Switch: Why it Shows Gain
        3. 2.3 Switch Based on Magnetic Tunnel Junctions: Would it Show Gain?
        4. 2.4 Giant Spin Hall Effect: A Route to Gain
        5. 2.5 Other Possibilities for Switches with Gain
        6. 2.6 What do Alternative Switches Have to Offer?
        7. 2.7 Perspective
        8. 2.8 Summary
        9. Acknowledgments
        10. References
    9. Part Two: Nanoelectronic Memories
      1. Chapter 3: Memory Technologies: Status and Perspectives
        1. 3.1 Introduction: Baseline Memory Technologies
        2. 3.2 Essential Physics of Charge-based Memory
        3. 3.3 Dynamic Random Access Memory
        4. 3.4 Flash Memory
        5. 3.5 Static Random Access Memory
        6. 3.6 Summary and Perspective
        7. Appendix: Memory Array Interconnects
        8. Acknowledgments
        9. References
      2. Chapter 4: Spin Transfer Torque Random Access Memory
        1. 4.1 Chapter Overview
        2. 4.2 Spin Transfer Torque
        3. 4.3 STT-RAM Operation
        4. 4.4 STT-RAM with Perpendicular Anisotropy
        5. 4.5 Stack and Material Engineering for Jc Reduction
        6. 4.6 Ultra-Fast Switching of MTJs
        7. 4.7 Spin–Orbit Torques for Memory Application
        8. 4.8 Current Demonstrations for STT-RAM
        9. 4.9 Summary and Perspectives
        10. References
      3. Chapter 5: Phase Change Memory
        1. 5.1 Introduction
        2. 5.2 Device Operation
        3. 5.3 Material Properties
        4. 5.4 Device and Material Scaling to the Nanometer Size
        5. 5.5 Multi-Bit Operation and 3D Integration
        6. 5.6 Applications
        7. 5.7 Future Outlook
        8. 5.8 Summary
        9. Acknowledgments
        10. References
      4. Chapter 6: Ferroelectric FET Memory
        1. 6.1 Introduction
        2. 6.2 Ferroelectric FET for Flash Memory Application
        3. 6.3 Ferroelectric FET for SRAM Application
        4. 6.4 System Consideration: SSD System with Fe-NAND Flash Memory
        5. 6.5 Perspectives and Summary
        6. References
      5. Chapter 7: Nano-Electro-Mechanical (NEM) Memory Devices
        1. 7.1 Introduction and Rationale for a Memory Based on NEM Switch
        2. 7.2 NEM Relay and Capacitor Memories
        3. 7.3 NEM-FET Memory
        4. 7.4 Carbon-based NEM Memories
        5. 7.5 Opportunities and Challenges for NEM Memories
        6. References
      6. Chapter 8: Redox-based Resistive Memory
        1. 8.1 Introduction
        2. 8.2 Physical Fundamentals of Redox Memories
        3. 8.3 Electrochemical Metallization Memory Cells
        4. 8.4 Valence Change Memory Cells
        5. 8.5 Performance
        6. 8.6 Summary
        7. References
      7. Chapter 9: Electronic Effect Resistive Switching Memories
        1. 9.1 Introduction
        2. 9.2 Charge Injection and Trapping
        3. 9.3 Mott Transition
        4. 9.4 Ferroelectric Resistive Switching
        5. 9.5 Perspectives
        6. 9.6 Summary
        7. References
      8. Chapter 10: Macromolecular Memory
        1. 10.1 Chapter Overview
        2. 10.2 Macromolecules
        3. 10.3 Elementary Physical Chemistry of Macromolecular Memory
        4. 10.4 Classes of Macromolecular Memory Materials and Their Performance
        5. 10.5 Perspectives
        6. 10.6 Summary
        7. Acknowledgments
        8. References
      9. Chapter 11: Molecular Transistors
        1. 11.1 Introduction
        2. 11.2 Experimental Approaches
        3. 11.3 Molecular Transistors
        4. 11.4 Molecular Design
        5. 11.5 Perspectives
        6. Acknowledgments
        7. References
      10. Chapter 12: Memory Select Devices
        1. 12.1 Introduction
        2. 12.2 Crossbar Array and Memory Select Devices
        3. 12.3 Memory Select Device Options
        4. 12.4 Challenges of Memory Select Devices
        5. 12.5 Summary
        6. References
      11. Chapter 13: Emerging Memory Devices: Assessment and Benchmarking
        1. 13.1 Introduction
        2. 13.2 Common Emerging Memory Terminology and Metrics
        3. 13.3 Redox RAM
        4. 13.4 Emerging Ferroelectric Memories
        5. 13.5 Mott Memory
        6. 13.6 Macromolecular Memory
        7. 13.7 Carbon-based Resistive Switching Memory
        8. 13.8 Molecular Memory
        9. 13.9 Assessment and Benchmarking
        10. 13.10 Summary and Conclusions
        11. Acknowledgments
        12. References
    10. Part Three: Nanoelectronic Logic and Information Processing
      1. Chapter 14: Re-Invention of FET
        1. 14.1 Introduction
        2. 14.2 Historical and Future Trend of MOSFETs
        3. 14.3 Near-term Solutions
        4. 14.4 Long-term Solutions
        5. 14.5 Summary
        6. References
      2. Chapter 15: Graphene Electronics
        1. 15.1 Introduction
        2. 15.2 Properties of Graphene
        3. 15.3 Graphene MOSFETs for Mainstream Logic and RF Applications
        4. 15.4 Graphene MOSFETs for Nonmainstream Applications
        5. 15.5 Graphene NonMOSFET Transistors
        6. 15.6 Perspectives
        7. Acknowledgment
        8. References
      3. Chapter 16: Carbon Nanotube Electronics
        1. 16.1 Carbon Nanotubes – The Ideal Transistor Channel
        2. 16.2 Operation of the CNTFET
        3. 16.3 Important Aspects of CNTFETs
        4. 16.4 Scaling CNTFETs to the Sub-10 Nanometer Regime
        5. 16.5 Material Considerations
        6. 16.6 Perspective
        7. 16.7 Conclusion
        8. References
      4. Chapter 17: Spintronics
        1. 17.1 Introduction
        2. 17.2 Spin Transistors
        3. 17.3 Magnetic Logic Circuits
        4. 17.4 Summary
        5. References
      5. Chapter 18: NEMS Switch Technology
        1. 18.1 Electromechanical Switches for Digital Logic
        2. 18.2 Actuation Mechanisms
        3. 18.3 Electrostatic Switch Designs
        4. 18.4 Reliability and Scalability
        5. References
      6. Chapter 19: Atomic Switch
        1. 19.1 Chapter Overview
        2. 19.2 Historical Background of the Atomic Switch
        3. 19.3 Fundamentals of Atomic Switches
        4. 19.4 Various Atomic Switches
        5. 19.5 Perspectives
        6. References
      7. Chapter 20: ITRS Assessment and Benchmarking of Emerging Logic Devices
        1. 20.1 Introduction
        2. 20.2 Overview of the ITRS Roadmap for Emerging Research Logic Devices
        3. 20.3 Recent Results for Selected Emerging Devices
        4. 20.4 Perspective
        5. 20.5 Summary
        6. Acknowledgments
        7. References
    11. Part Four: Concepts for Emerging Architectures
      1. Chapter 21: Nanomagnet Logic: A Magnetic Implementation of Quantum-dot Cellular Automata
        1. 21.1 Introduction
        2. 21.2 Technology Background
        3. 21.3 NML Circuit Design Based on Conventional, Boolean Logic Gates
        4. 21.4 Alternative Circuit Design Techniques and Architectures
        5. 21.5 Retrospective, Future Challenges, and Future Research Directions
        6. References
      2. Chapter 22: Explorations in Morphic Architectures
        1. 22.1 Introduction
        2. 22.2 Neuromorphic Architectures
        3. 22.3 Cellular Automata Architectures
        4. 22.4 Taxonomy of Computational Ability of Architectures
        5. 22.5 Summary
        6. References
      3. Chapter 23: Design Considerations for a Computational Architecture of Human Cognition
        1. 23.1 Introduction
        2. 23.2 Features of Biological Computation
        3. 23.3 Evolution of Behavior as a Basis for Cognitive Architecture Design
        4. 23.4 Considerations for a Cognitive Architecture
        5. 23.5 Emergent Cognition
        6. 23.6 Perspectives
        7. References
      4. Chapter 24: Alternative Architectures for NonBoolean Information Processing Systems
        1. 24.1 Introduction
        2. 24.2 Hierarchical Associative Memory Models
        3. 24.3 N-Tree Model
        4. 24.4 Summary and Conclusion
        5. Acknowledgments
        6. References
      5. Chapter 25: Storage Class Memory
        1. 25.1 Introduction
        2. 25.2 Traditional Storage: HDD and Flash Solid-state Drives
        3. 25.3 What is Storage Class Memory?
        4. 25.4 Target Specifications for SCM
        5. 25.5 Device Candidates for SCM
        6. 25.6 Architectural Issues in SCM
        7. 25.7 Conclusions
        8. References
    12. Part Five: Summary, Conclusions, and Outlook for Nanoelectronic Devices
      1. Chapter 26: Outlook for Nanoelectronic Devices
        1. 26.1 Introduction
        2. 26.2 Quantitative Logic Benchmarking for Beyond CMOS Technologies
        3. 26.3 Survey-based Critical Assessment of Emerging Devices
        4. 26.4 Retrospective Assessment of ERD Tracked Technologies
        5. References
    13. Index
    14. End User License Agreement

    Product information

    • Title: Emerging Nanoelectronic Devices
    • Author(s):
    • Release date: January 2015
    • Publisher(s): Wiley
    • ISBN: 9781118447741