9Electronic Effect Resistive Switching Memories

An Chen


9.1 Introduction

Mainstream memory technologies, including SRAM, DRAM, and Flash memories, are all CMOS-based and face scaling challenges. Recently, many novel memory device concepts have emerged as candidates for the next-generation nonvolatile memory technologies, including phase change memory (PCM), spin transfer torque RAM (STT-RAM), resistive RAM (RRAM), and so on. Although many emerging memories store information in switchable resistance levels, the name RRAM usually refers to the two-terminal metal–insulator–metal (MIM) resistive switching devices based on metal oxides. These devices can be electrically switched between a high resistance state (HRS, or off-state) and a low resistance state (LRS, or on-state). Multi-level cell (MLC) can be achieved with appropriate switching control (e.g., current compliance, switching voltage, etc.) or material stack engineering (e.g., multi-layer oxides). The HRS-to-LRS switching is known as “set” (or “program”) and the LRS-to-HRS switching as “reset” (or “erase”). The set and reset switching may occur in the same voltage polarity direction (“unipolar switching”) or in the opposite directions (“bipolar switching”).

Resistive switching in metal oxides is not a new phenomenon [1–3]. Hysteretic current-voltage (I-V) characteristics or negative differential resistance (NDR) was reported on numerous metal oxides, for example, TiOx [4,5], NiOx [6], AlOx [7], ...

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