Emerging Nanoelectronic Devices

26Outlook for Nanoelectronic Devices

An Chen¹, James Hutchby², Victor V. Zhirnov², and George Bourianoff³

¹GLOBALFOUNDRIES Inc., USA

²Semiconductor Research Corporation, USA

³Components Research Group, Intel Corporation, USA

26.1 Introduction

The purpose of this chapter is to summarize the potential of emerging research devices to perform their intended memory or information processing function benchmarked against current memory or CMOS technologies. These targeted functions include: (1) to extend and/or eventually replace CMOS with a highly scalable, high performance, low power information processing device technology and (2) to provide a memory or storage technology capable of scaling either volatile or nonvolatile memory technology beyond the 15 nm generation.

Two independent methods have been used to assess emerging devices. In a so-called “quantitative logic benchmarking,” emerging logic devices are evaluated by their operations in conventional Boolean Logic circuits, for example, a unity gain inverter, a two-input NAND gate, and a 32-bit adder. Metrics evaluated include speed, areal footprint, power dissipation, and so on. Each parameter is compared with that of the projected high-performance and low-power 15 nm CMOS. In the second method, referred to as “survey-based benchmarking,” ITRS Emerging Research Device (ERD) group conducts a survey among international experts to evaluate each emerging device technology against eight criteria normalized to high-performance CMOS ...