
244 Energy-Aware Memory Management for EMSs
−3 −2.5 −2 −1.5 −1 −0.5 0 0.5
100
150
200
250
V
bs
[V]
V
T
[mV]
Figure 7.6 Estimated V
th
for a 90 nm LVT NMOS transistor as function
of body bias V
BS
(W = 200 nm, L = Lmin).
Because t
ox
·
√
N
A
reduces with technology scaling [1], the impact of body bias
reduces with technology scaling. In this 90 nm technology, the combination
of 500 mV forward body bias (FBB) and 1000 mV reverse body bias (RBB)
results in a leakage reduction with a factor of 10 compared to a lower threshold
transistor with equal speed without body bias. In 22 nm, the reduction would
only be a factor of 3.
Temperature and process variability impacts subthreshold ...