
Chapter 8
Leakage Control in SoCs
Praveen Raghavan
IMEC, Heverlee, Belgium
Ashoka Sathanur
IMEC, Eindhoven, The Netherlands
Stefan Cosemans
K.U. Leuven, Leuven, Belgium
Wim Dahaene
K.U. Leuven, Leuven, Belgium
Contents
8.1 Leakage Power Reduction Techniques ...............................258
8.1.1 Power shutoff ..................................................259
8.1.2 Transistor stacking ............................................260
8.1.3 Use of multiple V
th
............................................261
8.1.4 Use of multiple V
dd
............................................261
8.2 Leakage Power Reduction Techniques Applied
to SRAM Memories .................................................. ...