286 Energy-Aware Memory Management for EMSs
For the sequence above, the total number of bits transitioning between
successive values is given by
0+1+0+2+0+1+0+3+...+1+0=194
In Schedule B, the sequence of addresses is:
0,{1,0,2,1,3,2,4,3,5,4,...,98,97,99,98},99
where braces denote accesses in the pipelined loop. The bit sequence corre-
sponding to this address sequence is given by
0: 00000000
1: 00000001 (1 transition)
0: 00000000 (1 transition)
2: 00000010 (1 transition)
1: 00000001 (2 transitions)
3: 00000011 (1 transition)
2: 00000010 (1 transition)
4: 00000100 (2 transitions)
3: 00000011 (3 transitions)
...
99: 01100011
98: 01100010 (1 transition)
99: 01100011 (1 transition)
For this sequence, the total number of bits transitioning between successive
values ...