
Energy-Efficient Memory Port Assignment 301
0
3000
6000
9000
12000
No. of Cycles
SOR-Performance
A-Single B-Single C-Single A-Dual B-Dual C-Dual
Figure 9.14 Performance comparison for SOR.
0
500
1000
1500
2000
Energy (× 0.001 uJ)
DP + FSM
Interconnect
Memory internal
To ta l
SOR-Energy
A-Single B-Single C-Single A-Dual B-Dual C-Dual
Figure 9.15 Energy dissipation comparison for SOR.