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Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
10.8 THE T, JK FLIP-FLOPS AND MISCELLANEOUS FLIP-FLOPS 455
FIGURE 10.41
Design of the JK flip-flops. (a) State diagram for any JK flip-flop. (b) Excitation table for the D
flip-flop memory. (c) NS K-map and NS function required for flip-flop conversion.
By using the mapping algorithm in Section 10.6 together with the state diagram for a JK
flip-flop and the excitation table for the memory D flip-flop, there results the NS logic
K-map and NS forming logic shown in Fig. 10.41c. Notice that only the Set and Set Hold
branching paths produce non-null entries in the NS K-map for D, a fact that is always true
when applying the mapping algorithm to D flip-flop memory elements. ...
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Publisher Resources

ISBN: 9780126912951