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Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
11.4 ASYNCHRONOUS INPUTS: RULES AND CAVEATS 515
cannot be predicted. But this is probably a moot point, since an oscillatory condition can
potentiallly cause far more serious problems than an unpredictable outcome following exit
from that state.
The foregoing discussion applies to any FSM, including flip-flops. As an example, the
resolver section of a D flip-flop shown in Fig. 10.31a can go metastable and cause both
the flip-flop and the FSM in which it is operating to malfunction. Thus, the synchronizer
in Fig. 11.20a is subject to the metastable condition and can pass that metastable state on
FIGURE 11.23
A two stage synchronizer scheme to greatly reduce ...
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Publisher Resources

ISBN: 9780126912951